Samsung Electronics Co. Chairman Lee Jae-yong departed for the US on Tuesday, just days before the US-set Aug. 1 deadline for a trade deal, signaling Seoul’s strategic use of semiconductor investments as a bargaining chip in ongoing tariff negotiations with Washington.
Semiconductors, particularly high-bandwidth memory (HBM) chips and advanced packaging technologies, have emerged as core components of US-Korea trade discussions.
Washington views them as essential to securing its global lead in an AI race and has pressed foreign chipmakers to ramp up local manufacturing as part of a broader industrial strategy.
The Korean chip giant is now reportedly weighing a revival of its previously scrapped plan to construct an advanced chip packaging line at the upcoming foundry site.
The company had initially earmarked $44 billion to build two foundry plants, an R&D center and the packaging line. But amid challenges securing large foundry clients, it dropped the packaging facility from the final plan last December.
Executing that deal may require building a state-of-the-art packaging line, capable of integrating HBM chips, a move that could entail an additional $7 billion investment.
Such a commitment would be timely for the South Korean government, which is under mounting pressure to assemble a robust US investment package that rivals those of Japan and the European Union, both of which secured reductions in their baseline tariffs to 15% after pledging substantial investments in the world’s largest economy.
Samsung's foundry chip plant in Taylor, Texas (Courtesy of Samsung Electronics) A Samsung official said the company is reviewing “various options” for US investment, but no final decision has been made.
The move would align with Washington’s push to onshore key semiconductor manufacturing capabilities and could generate synergies between its assembly and memory operations.
However, both companies face headwinds, including a shortage of local semiconductor talent and high operational costs for overseas deployment. They could also risk redundant investments, given their ongoing construction of massive chip clusters at home.
Despite such concerns, industry observers say geopolitical factors may outweigh economic concerns.
“In US investment, political considerations like trade talks often take precedence over cost-efficiency,” said a senior South Korean semiconductor executive.
“While building plants in the US isn’t ideal financially, pressure from the US government and US big tech customers’ calls for the expansion of local output can’t be ignored.”
TRADE TALKS CONTINUE UNDER TIGHT DEADLINE
Finance Minister Koo Yoon-cheol (center) dropped his planned trip to the US as Washington aruptly canceled bilateral trade talks South Korea’s Deputy Prime Minister and Finance Minister Koo Yoon-cheol and Industry Minister Kim Jung-kwan flew to Washington this week for high-stakes talks aimed at securing a favorable tariff arrangement before the looming Aug. 1 deadline.
The so-called 2+2 dialogue, originally scheduled for last Friday in Washington, D.C., was abruptly canceled by the US just hours before Korea’s chief negotiators were due to fly out.
The sudden delay has fueled concerns that South Korea may miss the Aug. 1 deadline to avoid or reduce a 25% additional tariff announced by Washington earlier this month.
In an attempt to revitalize tariff talks, Seoul is known to be considering a US investment package worth over $100 billion, involving both state-backed funds and private-sector commitments.
In addition to semiconductors, the two countries are expected to discuss Korean companies’ active involvement in the revival of the US shipbuilding sector.